Logic Circuits (Laboratory)

Module Information

Module Semester:
Module Part:
Sub-Module Code:
Hours per Week:
Module ECTS Credits:
Available to ERASMUS Students:

Module Study Targets

Ιn the laboratory the students will acquire the adequate Knowledge targeting the following outcomes:

  • Select the appropriate logic gates.
  • Implement algebraic functions using logic Gates.
  • Apply Boolean algebra to switching logic design and simplification.
  • Produce the 7 segment display operation.
  • Analyze and employ of basic circuits for arithmetic operations.
  • Design the basic memory element.
  • Design a register.
  • Compose gates and ICs.
  • Produce counters.
  • Select the appropriate memory for cost minimisation.
  • Compare the use of PLA, PAL, RPROMs.
  • Implement encoders and multiplexers.
  • Analyze digital combinational and sequential circuits.
  • Validate system’s functionality.
  • Examine ALTERA.

Module Acquired Abilities

  • Search, analysis and data synthesis.
  • Teamwork.
  • Decision-making.
  • Promotion of inductive thinking.

Module Description

The following laboratory exercises are implemented:

  • Logic Gates
  • Boolean Algebra - KARNAUGH MAP - DESIGN with NAND and NOR gates
  • Adders, subtractors
  • processor register – shift registers
  • Multiplexers, Demultiplexers
  • Counters I - Asynchronous binary counters
  • Counters II - APPLICATIONS WITH IC 74193 (Up-down counter, variable modulo-counter)
  • Programming PLA, PLA, PROM
  • A/D - D/A

Module Student Evaluation

Students’ evaluation comprises of the Theoretical part (60%) and laboratory (40%)

  1. Theoretical Part
    1. A written final examination (40%) comprising
      • number systems conversion
      • Use of codes
      • Counters
      • Basic applications using memories
      • Use of gates and Karnaugh map
      • Sequential and combinational circuits
      • memories
    2. Multiple choice exam (10%)
    3. Class participation (10%)
  2. Laboratory
    1. Individual or group (maximum 3 people) report to each laboratory exercise that includes a description of the exercise, presentation of measurements, presentation of results (calculations, charts, etc.) and conclusions. (20%)
    2. Weekly oral examination on the thematic unit (40%)
    3. Lab participation (10%)
    4. Final written examination (30%)

The criteria are posted on the site http://dniko.herokuapp.com/


  • M. Morris R. Mano and Michael D. Ciletti, "Digital Design", 4th Ed., 2012
  • J. Wakerly, "Digital Design: Principles and Practices", 2005
  • N.P. Cook, "Practical Digital Electronics", Pearson/Prentice Hall, 2004
  • W. Kleitz, "Digital Electronics. A Practical Approach", Prentice Hall, 2005
  • R.J. Tocci., N.S. Widmer, G.L. Moss, "Digital Systems, Principles and Applications", Pearson/Prentice Hall, 2004
  • T.L. Floyd, "Digital Fundamentals", 8th Ed., Prentice Hall, 8th ed., 2005
  • M. Balch, "Complete Digital Design", Mc Graw Hill, 2003
  • D.Givone, "Digital Principles and Design", Mc Graw Hill, 2002
  • Brian Holdsworth, Clive Woods, "Digital Logic Design", 4th Edition, Newnes, 2002
  • N. Balabanian, John Wiley,"Digital Logic Design Principles", 2001
  • Journal Article Resources: Circuits and Systems Magazine, IEEE

Module Links